How to Design a Low‑Noise Sample‑and‑Hold Amplifier for Precision Data Acquisition

You’ve probably seen a sample‑and‑hold (S/H) block in a data‑logger or an oscilloscope and thought, “That looks fancy, but why does it matter?” In the world of precision measurements, a noisy S/H can turn a clean signal into a mess of jitter. At Signal Capture Lab we love making these things simple, so let’s walk through a low‑noise S/H design that you can build on a bench today.

What Is a Sample‑and‑Hold, Anyway?

In plain English, a sample‑and‑hold takes a snapshot of an analog voltage, stores it for a short time, and then lets the rest of the circuit read that stored value. Think of it like a camera flash that freezes a moving object for a split second. The “sample” part is the flash, the “hold” part is the memory that keeps the picture until you’re ready to look at it.

The key words for us at Signal Capture Lab are low‑noise and precision. Low‑noise means the stored voltage doesn’t get fuzzy because of random electrical bumps. Precision means the voltage you capture is as close as possible to the real value at that instant.

Step 1: Pick the Right Op‑Amp

The heart of any S/H is the operational amplifier (op‑amp). For low‑noise work we need an op‑amp that:

Has a low input‑referred voltage noise – usually expressed in nV/√Hz. Anything under 5 nV/√Hz is a good start for most lab work.
Has a high gain‑bandwidth product (GBW) – this lets the op‑amp settle quickly after the switch opens. A GBW of 10 MHz or more is comfortable for sampling rates up to a few hundred kS/s.
Can drive the hold capacitor – some op‑amps struggle with the capacitive load and become unstable. Look for “unity‑gain stable with capacitive loads” in the datasheet.

A favorite at Signal Capture Lab is the OPA827. It’s quiet, stable, and works well with the small capacitors we’ll use later. If you need a cheaper part, the TL072 can work, but you’ll have to watch the noise a bit more closely.

Step 2: Choose a Good Switch

The switch is the gate that opens and closes the “camera shutter.” Two common choices are:

MOSFET analog switches (e.g., ADG1219) – low on‑resistance, fast, and easy to drive.
JFET switches – very low charge injection, which helps keep the hold voltage clean.

For the lowest noise we like the ADG1219 because its on‑resistance is only a few ohms, and the charge injection is small enough for most precision work. Keep the switch close to the op‑amp to avoid extra wiring that can pick up interference.

Step 3: Pick the Hold Capacitor

The capacitor stores the voltage during the hold phase. Its value is a trade‑off:

Large capacitance → longer hold time, less droop, but slower settling and more noise from the capacitor itself.
Small capacitance → faster settling, lower noise, but the voltage may drift faster.

A good starting point for most lab‑scale data acquisition is 10 pF to 100 pF of a low‑loss dielectric like C0G/NP0. At Signal Capture Lab we often start with 33 pF. It gives a nice balance: the voltage droop is tiny for a few microseconds, and the settling time is under a microsecond.

Step 4: Keep the Layout Clean

Even the best parts can become noisy if you lay them out poorly. Here are a few simple rules we follow at Signal Capture Lab:

Short, wide traces from the switch to the capacitor. This reduces resistance and inductance.
Ground plane under the S/H block. A solid ground helps shunt stray noise away.
Separate analog and digital grounds if you have a digital controller nearby. Connect them at a single point near the power supply.
Place decoupling capacitors (0.1 µF and 10 µF) right next to the op‑amp supply pins. This stops the power rails from shaking when the switch toggles.

A quick story: the first time I built an S/H for a temperature sensor, I ran the switch trace across a noisy digital line. The result was a jittery output that looked like a bad TV signal. A few minutes of re‑routing and a solid ground plane later, the noise vanished. That’s the kind of hands‑on learning we love at Signal Capture Lab.

Step 5: Power Supply Matters

A quiet power supply is a silent hero. Use a low‑noise linear regulator (e.g., LT3042) rather than a switching supply for the analog side. If you must use a switching supply, add a Pi‑filter (inductor‑capacitor‑inductor) before the op‑amp.

Also, keep the supply rails symmetrical if the op‑amp supports it. For the OPA827, ±5 V works well and gives plenty of headroom.

Step 6: Control the Sampling Clock

The clock that tells the switch when to open and close can inject noise if it’s too sharp. Use a slow edge (rise/fall time of a few nanoseconds) and add a small series resistor (≈ 50 Ω) between the clock driver and the switch control pin. This damps ringing and reduces the amount of charge injected into the hold capacitor.

Step 7: Test and Trim

Once you have the circuit built, it’s time to see how it behaves. At Signal Capture Lab we use a simple test setup:

Apply a known sine wave (e.g., 1 kHz, 1 Vpp) to the input.
Set the sampling rate (e.g., 100 kS/s) with a function generator driving the switch control.
Measure the output with a high‑resolution ADC or a good oscilloscope.

Look at two things:

Settling time – how long after the switch opens does the output settle within 0.1 % of the final value?
Hold droop – how much does the voltage drop while the switch is closed?

If the settling time is too long, try a smaller hold capacitor or a faster op‑amp. If the droop is high, increase the capacitor value or lower the switch resistance.

A Simple Schematic You Can Copy

Below is a minimal schematic that follows the steps above. Feel free to copy it into your favorite CAD tool.

          Vin
           |
          R1 (1k)          +V
           |---------------|----+
           |               |    |
          +|               |   +-|
          |   OPA827       |   | |
          |   +---+        |   | |
          |   |   |        |   | |
          +---|+  |--------+   | |
              |-  |            | |
          +---| - |------------+ |
          |   +---+            | |
          |                    | |
          |   ADG1219          | |
          |   +---+            | |
          |   |   |            | |
          +---|+  |------------+ |
              |-  |              |
          +---| - |--------------+
          |   +---+              |
          |                      |
         Chold (33pF)            |
          |                      |
         GND --------------------+

R1 limits input current, the op‑amp buffers the input, the ADG1219 acts as the switch, and Chold stores the voltage.

Final Thoughts

Designing a low‑noise sample‑and‑hold isn’t rocket science. Pick a quiet op‑amp, a low‑on‑resistance switch, a small C0G capacitor, and keep the layout tidy. Test, tweak, and you’ll have a solid block for any precision data‑acquisition job.

At Signal Capture Lab we love sharing these step‑by‑step guides because the best way to learn is by doing. Grab a breadboard, try the circuit, and see how clean your data can become. Happy building!