A Step‑by‑Step Guide to Designing Your First SPLD‑Based Control Unit

You might think “control unit” sounds like something only big companies can build, but the truth is you can put together a tiny, reliable controller on a single chip right in your garage. With an SPLD (Simple Programmable Logic Device) you get the flexibility of a microcontroller without the need to write a lot of software. In today’s fast‑moving world of IoT and embedded projects, having a quick, hardware‑level solution can save you weeks of debugging.

What Is an SPLD and Why Use It for a Control Unit?

An SPLD is a small, cheap chip that lets you define a handful of logic equations. Think of it as a Lego board where each brick is a logic gate (AND, OR, NOT) that you can arrange however you like. Unlike a full‑blown FPGA, an SPLD has a limited number of gates—usually a few dozen to a few hundred—but that is more than enough for a simple control unit.

A control unit is the part of a digital system that decides what happens next based on inputs and the current state. For example, a traffic‑light controller decides when to turn red, green, or yellow based on a timer and maybe a pedestrian button. Using an SPLD for this job gives you:

• Deterministic timing – no operating‑system jitter.
• Low power – the chip only switches the gates you need.
• Easy updates – just re‑program the device with a new truth table.

Step 1: Define the Functionality

Before you open any software, write down exactly what your control unit must do. A good way to start is a truth table that lists all inputs, the current state, and the desired next state.

Inputs:  Start (S), Stop (P), Error (E)
State bits: Q1 Q0   (2‑bit state register)
Outputs:  MotorOn (M), Alarm (A)

For a simple motor controller you might have four states:

Write the next‑state logic and output logic on paper. This step is where many beginners get stuck, but a clear table saves you from chasing bugs later.

Step 2: Choose the Right SPLD

Not all SPLDs are created equal. For a first project I like the Atmel ATF1502AS or the Lattice ispMACH 4000. They both have:

• 64‑256 macrocells (each macrocell = a small logic block)
• Simple JTAG programming interface
• Low cost (under $5 in bulk)

Check the datasheet for the number of inputs/outputs you need. If you only have a few signals, a 64‑macrocell device is more than enough.

Step 3: Map Your Logic to Macrocells

Each macrocell can implement a small sum‑of‑products equation. Take the next‑state equation for Q1 as an example:

Q1_next = (S AND NOT Q1) OR (E AND Q0) OR (P AND Q1)

Break it into two parts that fit a macrocell:

1. AND‑plane – combine the required inputs.
2. OR‑plane – sum the results.

Most SPLD design tools (e.g., Atmel’s ATF150xAS Designer or Lattice’s ispLEVER) let you draw a schematic or write a simple truth table. Drag the inputs, connect them with AND gates, then feed the results into an OR gate. The tool will automatically assign macrocells.

Step 4: Write the Design File

If you prefer a text‑based approach, use the JED file format. It’s a list of fuse settings that tells the chip which gates to close. Here’s a tiny snippet for a 2‑bit state machine:

*F1502AS
QF 0000 0011 1100 1111
...
*END

Don’t worry if the syntax looks odd; the design software can export the JED file for you. Just make sure you keep a copy of the source (the schematic or truth table) so you can regenerate it later.

Step 5: Simulate Before You Burn

Even a simple control unit can have hidden race conditions. Use the built‑in simulator in the SPLD toolchain or a free program like Logisim. Load your design, apply test vectors (e.g., S=1, P=0, E=0) and watch the state bits change. If the outputs don’t match your table, go back and adjust the equations.

I once spent an entire weekend debugging a motor controller that kept resetting. The culprit was a missing “hold” condition in the state machine – a tiny oversight that simulation would have caught.

Step 6: Program the Device

Connect the SPLD to your PC with a JTAG cable. Open the programmer software, load the JED file, and hit “Program.” The process usually takes a few seconds. After programming, power the chip and verify the outputs with a LED or a logic probe.

If you see the wrong state, double‑check the pin assignments. SPLDs often have “default” pin locations that differ from the schematic you drew. A quick look at the datasheet clears this up.

Step 7: Build the Prototype Board

For a first try, a small breadboard works fine. Wire the inputs (buttons, sensors) to the appropriate pins, and connect the outputs to LEDs or a small motor driver. Keep the power supply clean—most SPLDs run at 3.3 V or 5 V, and they don’t like noise on the VCC pin.

Tip: add a 0.1 µF decoupling capacitor close to the chip. It’s a tiny part that saves you from mysterious resets.

Step 8: Test in Real Conditions

Run the control unit through all scenarios: normal operation, start‑stop cycles, and error conditions. Measure the timing with a stopwatch or a cheap oscilloscope. The SPLD should change states within a few nanoseconds—practically instant for a human‑scale system.

If you notice bounce on a button, add a small RC filter or use a debouncing circuit. Remember, the SPLD does not magically clean up noisy inputs.

Step 9: Document and Iterate

Write a short note on what each pin does, the state diagram, and any quirks you discovered. Future you (or a teammate) will thank you when you need to add a new feature, like a “pause” state.

Iterating is easy: change the truth table, re‑export the JED file, and re‑program. No soldering, no firmware upload—just a quick software tweak.

Closing Thoughts

Designing a control unit with an SPLD is a great way to learn digital design without drowning in code. You get to see the hardware react in real time, and you build a reusable block that can be dropped into many projects. The steps above may look long, but each one is a small, manageable task. Take it one step at a time, and you’ll have a reliable controller before you know it.